DMMR-MATISSE - Custom Dynamic Memory Allocation Tool |
04/22/2013 - 15:22 |
Designing SoC/FPGA platforms at high level using SPACE |
04/22/2013 - 15:23 |
A Platform for Multi-Language Mixed-Signal Simulation |
04/22/2013 - 15:23 |
SystemC Studio: Translation for TLM Combined Simulation and Synthesis |
04/22/2013 - 15:23 |
TLM Synthesis Studio |
04/22/2013 - 15:24 |
Methods and tools for synthesizing energy-efficient LCD bus interfaces |
04/22/2013 - 15:24 |
Demonstration of a Self-Reconfigurable Video-Processing Framegrabber |
04/22/2013 - 15:24 |
HIFSuite: Tools for HDL Code Manipulation |
04/22/2013 - 15:24 |
NEX: A Network Emulator boX to support the design of networked systems |
04/22/2013 - 15:25 |
Automated metal interconnect structure generation |
04/22/2013 - 15:25 |
SemiCustom Design Flow |
04/22/2013 - 15:26 |
High Level Transformations using Taylor Expansion Diagrams |
04/22/2013 - 15:27 |
Asynchronous Micropipeline Synthesis Flow |
04/22/2013 - 15:28 |
MoDES: Model Driven Development of Inteligent Embedded Systems |
04/30/2013 - 19:02 |
MIMO_SD_FEC demo: MIMO Detection-Decoding Engine |
01/18/2014 - 21:32 |
A Data-driven Synchronous Elastic Synthesiser |
01/18/2016 - 13:40 |
NoC on Graphics Processing Unit |
01/02/2017 - 09:48 |
OVPsim-FIM |
01/14/2018 - 20:29 |
Open-PEOPLE - Open - Power and Energy Optimization Platform and Estimator |
09/09/2019 - 16:26 |
HEAP: The HEAP software parallelization toolset |
09/09/2019 - 17:58 |
zamiaCAD: Applications for the Open Source HW Design Framework zamiaCAD |
09/09/2019 - 17:59 |
Analog Performance Explorer |
09/09/2019 - 18:12 |
GAUT: High-Level Synthesis Tool (from C/C++ to RTL) |
09/09/2019 - 18:13 |
Sym TA/S: Performance Analysis of Tightly Coupled Multiprocessor Systems |
09/09/2019 - 18:16 |
An Integrated Environment for P1500 Compliance Checking |
03/30/2020 - 18:36 |
Dynamic Virtual Analyzer and Simulator |
03/30/2020 - 18:38 |
A Tool Flow for Design Space Exploration of Partially Re-configurable Processors |
03/30/2020 - 18:43 |
Petrify |
03/30/2020 - 18:57 |
TOISE: Trusted Computing for European Embedded devices |
03/30/2020 - 19:10 |
RcvASIP - FPGA Prototype of Flexible Heterogeneous multi-ASIP NoC-based Unified Turbo Receiver |
03/30/2020 - 19:21 |
Verification Environment for SoC - Demonstration of a Coverage Driven Verification Environment for UML Models of Systems-on-Chip |
03/30/2020 - 19:21 |
ASPV: application-specific vector co-processor for embedded DSP in FPGAs |
03/30/2020 - 19:21 |
Bounded Property Checking with SymC |
03/30/2020 - 19:22 |
Analog Insydes |
03/30/2020 - 19:22 |
Higher Education Program |
03/30/2020 - 19:22 |
NOSTRUM |
03/30/2020 - 19:22 |
Refactoring for VHDL-AMS |
03/30/2020 - 19:22 |
POLYSIGNAL |
03/30/2020 - 19:22 |
CHAMELEON: A CHAracterization and ModELing EnvirONment |
03/30/2020 - 19:22 |
Automatic Design Space Exploration for SystemC Models |
03/30/2020 - 19:23 |
A graphical SystemC refinement tool |
03/30/2020 - 19:23 |
SystemC Environment |
03/30/2020 - 19:23 |
A High-Speed Dynamic Reconfigurable Multilevel Parallel Architecture |
03/30/2020 - 19:23 |
ADHAM: Adaptive Heap Management on Many-Core Platforms |
03/30/2020 - 19:53 |
EDADB - Tools for semi-automatic Technology Porting of Integrated Mixed-Signal Circuits and Documentation |
03/30/2020 - 19:53 |
Functional ATPG to Traverse Extended FSMs |
03/30/2020 - 19:53 |
Static and Dynamic Analysis
of SystemC Designs |
03/30/2020 - 19:53 |
A Reconfiguration Simulation Library For SystemC |
03/30/2020 - 19:53 |
CAD tools dedicated to the design and test of RFICs |
03/30/2020 - 19:53 |
CAIRO+ |
03/30/2020 - 19:53 |