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Tool Name Author(s) Last updated
Dynamic Virtual Analyzer and Simulator Madsen, Jan
Hasan Baig, DTU C...
03/30/2020 - 17:38
ATLAS - A Framework for NoC Generation and Evaluation
Alexandre Amory (PUCRS)
Ney Calazans (PUCRS)
Fernando Moraes (PUCRS)

- -, -, DE
07/04/2012 - 14:05
GAUT: High-Level Synthesis Tool (from C/C++ to RTL)
Dominique Heller
Dr. Pierre Bomel (pierre.bomel@univ-ubs.fr)

Philippe Coussy, ...
09/09/2019 - 17:13
µSPIDER CAD TOOL: CASE STUDY OF NOC IP GENERATION FOR FPGA 04/18/2013 - 10:34
Submarine Explorer – A low cost AUV 10/26/2012 - 15:43
SDF3 04/18/2013 - 12:56
RcvASIP - FPGA Prototype of Flexible Heterogeneous multi-ASIP NoC-based Unified Turbo Receiver
Atif Raza Jafri (Institut Telecom; Telecom Bretagne; Lab-STICC)
Amer Baghdadi (Institut Telecom; Telecom Bretagne; Lab-STICC)
Michel Jézéquel (Institut Telecom; Telecom Bretagne; Lab-STICC)

- -, -, FR
03/30/2020 - 18:21
3D-ICE: the new 3D Interlayer Cooling Emulator for thermal simulations of 3D ICs
Arvind Sridhar (EPFL)
Martino Ruggiero (EPFL)
David Atienza (EPFL)

- -, -, CH
07/04/2012 - 13:56
MarciaTesta++: an automatic generator of assembly test programs for microprocessors’ data and instruction caches.
Daniele Rolfo (Politecnico di Torino)
Marco Indaco (Politecnico di Torino)
Stefano Di Carlo (Politecnico di Torino)
Paolo Prinetto (Politecnico di Torino)

- -, -, IT
07/02/2012 - 09:38
ENHANCEMENTS OF STATECHART-MODELING— THE KIEL ENVIRONMENT 10/26/2012 - 15:43