Skip to Content

Refactoring for VHDL-AMS

0
Your rating: None
(unregistered) Author(s): 
Kaiping Zeng zeng@vlsi.informatik.tu-darmstadt.de
Sorin Huss

A large variety of modern applications are based on mixed analog-digital circuits that are fabricated on the same silicon chip as systems on chip (SoC). Such circuits provide information processing and communications capabilities to consumer electronics, industrial automation, retail automation and medical markets. The growing need for mixed analog-digital application-specific integrated circuits has accelerated efforts in analog circuit design automation. Although there is a strong trend towards implementing as much signal processing functionality as possible in the digital domain, analog circuits will always play an important role in these interfaces, e.g., for amplification and filtering of the noise-sensitive sensor signals and for A/D conversion. A very important problem in the design of these mixed-signal sensor interfaces is the lack of mature analog CAD tools, especially at levels higher than the opamp level, resulting in unacceptably long design times for the analog sensor interface front-end. In the current work, a high-level analog synthesis methodology is presented. High-level synthesis is the automated synthesis of a digital design from its behavioral specifications. It takes as input an abstract high-level specification of the system to be designed, and automatically produces an architecture, in which all the sub-blocks have been completely specified. The proposed code refactoring methodology restructures, refines, and simplifies an analog behavioral model written in VHDL-AMS by performing code transformations on the given model. Through code refactoring one improves the comprehensibility, expandability and reusability of the behavioral model and brings the model to a necessary preliminary stage for the actual circuit synthesis. The methodology has been implemented as a tool---RAMS, which supports the top-down hierarchical design flow for analog and mixed-signal application.Project Information

Project Acronym: 
SAMS
Project Start: 
Sat, 11/01/2003
Project End: 
Tue, 10/31/2006
Project Funding ID: 
BMBF 01M3070
Project Description: 
Structural Synthesis of Analog Circuits: SAMS: Structural Synthesis of Analog Systems