Bounded Model Checker Using Property Based Automated Abstractions |
10/26/2012 - 16:43 |
Bounded Property Checking with SymC |
03/30/2020 - 19:22 |
C++TESK Testing ToolKit |
12/27/2012 - 10:46 |
C++TESK: Testing ToolKit |
07/04/2012 - 16:16 |
CAD tools dedicated to the design and test of RFICs |
03/30/2020 - 19:53 |
CAERT - Compiler Assisted Energy Reduction Techniques for Embedded Processors |
07/04/2012 - 15:08 |
CAIRO+ |
03/30/2020 - 19:53 |
CandoGen – A Property-Based Model Generator |
03/30/2020 - 19:53 |
CHAMELEON: A CHAracterization and ModELing EnvirONment |
03/30/2020 - 19:22 |
Chip Design Constraint Checker |
06/20/2012 - 10:18 |
Co-simulation tools for Networked Embedded Systems |
10/26/2012 - 16:43 |
COMPLEX_UML_MARTE: The COMPLEX Eclipse Framework for UML/MARTE Specification of Embedded Systems and Automatic Generation of Executable Models for Design Space Exploration |
10/01/2012 - 19:37 |
CoMPSoC: Virtual Platforms for Energy Efficient Execution of Mixed Time-Criticality Applications |
10/02/2012 - 11:38 |
Configuration Tool and FPGA-Prototype of a Hardware Packet Processing System |
04/22/2013 - 15:19 |
Constraint-Engineering-System |
10/26/2012 - 16:43 |
Coplan for ADS |
10/26/2012 - 16:43 |
CRAVE - CRAVE: An Advanced Constrained Random Verification Environment for SystemC |
07/02/2012 - 10:50 |
CRISP - A dynamically reconfigurable many-core platform for streaming applications. |
10/11/2012 - 06:15 |
Custom Dynamic Memory Allocation Tool |
03/30/2020 - 19:53 |
Cycle-accurate simulation of object oriented descriptions for runtime-reconfigurable systems |
04/18/2013 - 16:09 |
CλaSH - Functional Hardware Design in CλaSH |
10/11/2012 - 06:12 |
Daedalus^RT: The System-Level Design Flow for Hard-Real-Time Embedded MPSoCs Platforms |
12/21/2012 - 18:55 |
Data Converter BIST Development Tools |
03/30/2020 - 19:53 |
DECIDER: Test and Verification at the Register-Transfer Level |
10/26/2012 - 16:43 |
Demonstration of a Self-Reconfigurable Video-Processing Framegrabber |
04/22/2013 - 15:24 |
Design Cost Controlling |
10/26/2012 - 16:43 |
Designing SoC/FPGA platforms at high level using SPACE |
04/22/2013 - 15:23 |
DIESEL |
03/30/2020 - 19:53 |
Digital System Design Environment |
03/30/2020 - 19:53 |
DMMR-MATISSE - Custom Dynamic Memory Allocation Tool |
04/22/2013 - 15:22 |
Dynamic Virtual Analyzer and Simulator |
03/30/2020 - 18:38 |
eClock - All-Digital PLL Compiler for On-Chip High-Speed Clock Generation |
07/04/2012 - 15:20 |
EDADB - Tools for semi-automatic Technology Porting of Integrated Mixed-Signal Circuits and Documentation |
03/30/2020 - 19:53 |
EduCAD - an Efficient, Flexible and Easily Revisable Physical Design Tool for Educational Purposes |
07/04/2012 - 15:36 |
Embedded Instruments for Board-level Test |
07/02/2012 - 09:51 |
Embedded System-Level Platform Synthesis and Application Mapping tool |
03/30/2020 - 19:53 |
Empire |
03/30/2020 - 19:53 |
ENHANCEMENTS OF STATECHART-MODELING—
THE KIEL ENVIRONMENT |
10/26/2012 - 16:43 |
Erlangen Slot Machine |
03/30/2020 - 19:53 |
Evolvable Hardware FPGA-based platform for Autonomous Fault-tolerant Systems |
07/04/2012 - 16:43 |
False Path Search Tool Kit |
03/30/2020 - 19:53 |
Fast Distributed Property Checking |
10/02/2012 - 18:24 |
Fast Instruction Cache Analyzer (FICA) |
03/30/2020 - 19:53 |
FlexFilm: Real-time digital film processing with a FPGA-based reconfigurable platform |
10/02/2012 - 01:00 |
FoREnSiC: An Automatic Debugging Environment for C Programs |
07/04/2012 - 16:19 |
Formal Verification of Design Properties of Hardware Architectures |
10/26/2012 - 16:43 |
Functional ATPG to Traverse Extended FSMs |
03/30/2020 - 19:53 |
GA based ATPG Tool for Crosstalk Induced Logic Faults between On-chip Aggressor and Victim |
03/30/2020 - 19:53 |
GAUT: High-Level Synthesis Tool (from C/C++ to RTL) |
09/09/2019 - 18:13 |
General Purpose VLIW Processor for Multiband-Multistandard applications |
11/30/2012 - 13:39 |