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C++TESK Testing ToolKit

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Tool Name (abbreviation): 
C++TESK
Author(s): 
- -, -, RU
- -, -, RU

C++TESK Testing ToolKit is an open-source C++ based toolkit intended for automated functional testing of software components (mostly in C/C++) and RTL (HDL) models of digital hardware (in Verilog and VHDL). The main part of the toolkit is a library of C++ classes and macros that define facilities for constructing formal specifications (reference models), adapters of components under test, test scenarios and test coverage metrics. Basing on C++ descriptions provided by a user, a test system is compiled. It allows automatically generating and applying sequences of stimuli to the component under test, checking correctness of its reactions and collecting statistics on test execution. Besides the basic library, the toolkit includes a report generator, means for parallelizing test execution on computer clusters, and Eclipse-based IDE.

Project Information
Project Acronym: 
C++TESK Testing ToolKit
Project Start: 
Tue, 06/01/2010
Project Description: 
C++TESK Testing ToolKit combines results of the following ISPRAS's projects: C++TESK (creation of formal specifications, test scenarios and test coverage metrics by means of C++ programming language), C++TESK Hardware Edition (development of reference models of hardware designs and C++-RTL adapters), CTESK (automated generation of test sequences using graph exploration techniques), Distributed FSM (tests parallelization on computer networks and clusters) and Aspectrace (test event tracing and report generation). The project also depends on VeriTool (generation of C/C++ API for Verilog modules), which in turn depends on Icarus Verilog.
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Keywords: 
Simulation-Based Verification
Model-Based Testing
Hardware Modeling