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LANCE Retargetable C Compiler |
04/22/2013 - 15:21 |
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Lance Compiler Frontend |
10/31/2012 - 10:05 |
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LambdaChartExplorer: System Level EDA via Lambda Chart Exploration |
07/04/2012 - 16:09 |
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IPWM |
10/26/2012 - 16:43 |
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IdEM & MpiLOG: Macromodeling Tools for System-Level Signal Integrity and EMC Assessment |
03/30/2020 - 19:54 |
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ID.Fix - Infrastructure for the design of fixed-point systems |
07/04/2012 - 15:09 |
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HPM: an interactive web service for high-performance macromodeling of passive interconnects in system-level verification flows |
07/04/2012 - 16:00 |
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Higher Education Program |
03/30/2020 - 19:22 |
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High-level C-Compilerframework ICD-C |
04/18/2013 - 14:24 |
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High Level Transformations using Taylor Expansion Diagrams |
04/22/2013 - 15:27 |
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HIFSuite: Tools for HDL Code Manipulation |
04/22/2013 - 15:24 |
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HiFSimReD: Transaction Level Fault Simulation, Recovery, and Mapping |
07/04/2012 - 16:20 |
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Hierarchical Test Application and Evaluation |
07/04/2012 - 15:12 |
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HEAP: The HEAP software parallelization toolset |
09/09/2019 - 17:58 |
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HDL-based Test Evaluation Tool Set |
07/02/2012 - 09:52 |
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Hardware/software architecture of an algorithm for vision-based real-time vehicle detection in dark environments |
10/26/2012 - 16:43 |
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Hardware-in-the-Loop Simulations with Matlab/Simulink/ModelSim for FPGA based designflows |
04/18/2013 - 12:16 |
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GSNOC - A Generic Scalable Simulation Framework for 3-Dimension Networks-on-Chip |
07/04/2012 - 15:53 |
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GeneralStore |
06/05/2012 - 18:13 |
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General Purpose VLIW Processor for Multiband-Multistandard applications |
11/30/2012 - 13:39 |
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GAUT: High-Level Synthesis Tool (from C/C++ to RTL) |
09/09/2019 - 18:13 |
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GA based ATPG Tool for Crosstalk Induced Logic Faults between On-chip Aggressor and Victim |
03/30/2020 - 19:53 |
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Functional ATPG to Traverse Extended FSMs |
03/30/2020 - 19:53 |
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Formal Verification of Design Properties of Hardware Architectures |
10/26/2012 - 16:43 |
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FoREnSiC: An Automatic Debugging Environment for C Programs |
07/04/2012 - 16:19 |
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FlexFilm: Real-time digital film processing with a FPGA-based reconfigurable platform |
10/02/2012 - 01:00 |
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Fast Instruction Cache Analyzer (FICA) |
03/30/2020 - 19:53 |
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Fast Distributed Property Checking |
10/02/2012 - 18:24 |
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False Path Search Tool Kit |
03/30/2020 - 19:53 |
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Evolvable Hardware FPGA-based platform for Autonomous Fault-tolerant Systems |
07/04/2012 - 16:43 |
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Erlangen Slot Machine |
03/30/2020 - 19:53 |
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ENHANCEMENTS OF STATECHART-MODELING—
THE KIEL ENVIRONMENT |
10/26/2012 - 16:43 |
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Empire |
03/30/2020 - 19:53 |
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Embedded System-Level Platform Synthesis and Application Mapping tool |
03/30/2020 - 19:53 |
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Embedded Instruments for Board-level Test |
07/02/2012 - 09:51 |
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EduCAD - an Efficient, Flexible and Easily Revisable Physical Design Tool for Educational Purposes |
07/04/2012 - 15:36 |
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EDADB - Tools for semi-automatic Technology Porting of Integrated Mixed-Signal Circuits and Documentation |
03/30/2020 - 19:53 |
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eClock - All-Digital PLL Compiler for On-Chip High-Speed Clock Generation |
07/04/2012 - 15:20 |
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Dynamic Virtual Analyzer and Simulator |
03/30/2020 - 18:38 |
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DMMR-MATISSE - Custom Dynamic Memory Allocation Tool |
04/22/2013 - 15:22 |
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Digital System Design Environment |
03/30/2020 - 19:53 |
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DIESEL |
03/30/2020 - 19:53 |
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Designing SoC/FPGA platforms at high level using SPACE |
04/22/2013 - 15:23 |
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Design Cost Controlling |
10/26/2012 - 16:43 |
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Demonstration of a Self-Reconfigurable Video-Processing Framegrabber |
04/22/2013 - 15:24 |
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DECIDER: Test and Verification at the Register-Transfer Level |
10/26/2012 - 16:43 |
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Data Converter BIST Development Tools |
03/30/2020 - 19:53 |
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Daedalus^RT: The System-Level Design Flow for Hard-Real-Time Embedded MPSoCs Platforms |
12/21/2012 - 18:55 |
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CλaSH - Functional Hardware Design in CλaSH |
10/11/2012 - 06:12 |
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Cycle-accurate simulation of object oriented descriptions for runtime-reconfigurable systems |
04/18/2013 - 16:09 |
