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OS based Wireless Body Area Network for ECG |
03/30/2020 - 18:55 |
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A SPARC V8 Processor with Cryptography Extensions |
03/30/2020 - 18:54 |
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IdEM & MpiLOG: Macromodeling Tools for System-Level Signal Integrity and EMC Assessment |
03/30/2020 - 18:54 |
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Multiple simultaneous upset fault-tolerant FIR circuit design using delta-sigma modulation |
03/30/2020 - 18:53 |
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False Path Search Tool Kit |
03/30/2020 - 18:53 |
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Fast Instruction Cache Analyzer (FICA) |
03/30/2020 - 18:53 |
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XSIM: An Efficient Simulator for Crosstalk Analysis netween On-chip Interconnects
Kishore Duganapalli |
03/30/2020 - 18:53 |
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GA based ATPG Tool for Crosstalk Induced Logic Faults between On-chip Aggressor and Victim |
03/30/2020 - 18:53 |
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Test Compaction of Crosstalk Faults through Fault List Reordering |
03/30/2020 - 18:53 |
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Embedded System-Level Platform Synthesis and Application Mapping tool |
03/30/2020 - 18:53 |
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SystemCoDesigner – The System-Level Hardware-Software-Co-Design Tool |
03/30/2020 - 18:53 |
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Erlangen Slot Machine |
03/30/2020 - 18:53 |
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Empire |
03/30/2020 - 18:53 |
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Custom Dynamic Memory Allocation Tool |
03/30/2020 - 18:53 |
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Digital System Design Environment |
03/30/2020 - 18:53 |
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DIESEL |
03/30/2020 - 18:53 |
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TTool for DIPLODOCUS: An Environment for Design Space Exploration |
03/30/2020 - 18:53 |
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Data Converter BIST Development Tools |
03/30/2020 - 18:53 |
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CandoGen – A Property-Based Model Generator |
03/30/2020 - 18:53 |
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CAIRO+ |
03/30/2020 - 18:53 |
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CAD tools dedicated to the design and test of RFICs |
03/30/2020 - 18:53 |
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A Reconfiguration Simulation Library For SystemC |
03/30/2020 - 18:53 |
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Static and Dynamic Analysis
of SystemC Designs |
03/30/2020 - 18:53 |
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Functional ATPG to Traverse Extended FSMs |
03/30/2020 - 18:53 |
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EDADB - Tools for semi-automatic Technology Porting of Integrated Mixed-Signal Circuits and Documentation |
03/30/2020 - 18:53 |
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ADHAM: Adaptive Heap Management on Many-Core Platforms |
03/30/2020 - 18:53 |
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A graphical SystemC refinement tool |
03/30/2020 - 18:23 |
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A High-Speed Dynamic Reconfigurable Multilevel Parallel Architecture |
03/30/2020 - 18:23 |
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Automatic Design Space Exploration for SystemC Models |
03/30/2020 - 18:23 |
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SystemC Environment |
03/30/2020 - 18:23 |
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CHAMELEON: A CHAracterization and ModELing EnvirONment |
03/30/2020 - 18:22 |
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Refactoring for VHDL-AMS |
03/30/2020 - 18:22 |
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POLYSIGNAL |
03/30/2020 - 18:22 |
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NOSTRUM |
03/30/2020 - 18:22 |
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Analog Insydes |
03/30/2020 - 18:22 |
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Higher Education Program |
03/30/2020 - 18:22 |
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Bounded Property Checking with SymC |
03/30/2020 - 18:22 |
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ASPV: application-specific vector co-processor for embedded DSP in FPGAs |
03/30/2020 - 18:21 |
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Verification Environment for SoC - Demonstration of a Coverage Driven Verification Environment for UML Models of Systems-on-Chip |
03/30/2020 - 18:21 |
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RcvASIP - FPGA Prototype of Flexible Heterogeneous multi-ASIP NoC-based Unified Turbo Receiver |
03/30/2020 - 18:21 |
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TOISE: Trusted Computing for European Embedded devices |
03/30/2020 - 18:10 |
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Petrify |
03/30/2020 - 17:57 |
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A Tool Flow for Design Space Exploration of Partially Re-configurable Processors |
03/30/2020 - 17:43 |
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Dynamic Virtual Analyzer and Simulator |
03/30/2020 - 17:38 |
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An Integrated Environment for P1500 Compliance Checking |
03/30/2020 - 17:36 |
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Sym TA/S: Performance Analysis of Tightly Coupled Multiprocessor Systems |
09/09/2019 - 17:16 |
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GAUT: High-Level Synthesis Tool (from C/C++ to RTL) |
09/09/2019 - 17:13 |
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Analog Performance Explorer |
09/09/2019 - 17:12 |
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zamiaCAD: Applications for the Open Source HW Design Framework zamiaCAD |
09/09/2019 - 16:59 |
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HEAP: The HEAP software parallelization toolset |
09/09/2019 - 16:58 |
