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Tool Name | Author(s) | Updated | Screenshot | Average Vote |
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Statistical Thermal Evaluation and Yield Improvement Considering Process Variation for 3D Chip-Multiprocessors |
Da-Cheng Juan (Carnegie Mellon University) Diana Marculescu (Dept. of Electrical and Computer Engineering, Carnegie Mellon University) Siddharth Garg (Dept. of Electrical and Computer Engineering, University of Waterloo) - -, -, US |
07/01/2011 - 22:08 | ||
Biological Information Sensing Systems |
Masaharu Imai (Osaka University) - -, -, JP |
07/01/2011 - 22:08 | ||
HDL-based Test Evaluation Tool Set |
Atieh Lotfi (University of Tehran) Parisa Sha'afi Kabiri (University of Tehran) Nastaran Nemati (University of Tehran) - -, -, IR |
07/01/2011 - 22:08 | ||
Hierarchical Test Application and Evaluation |
Zahra Najafi Haghi (University of Tehran) Somayeh Sadeghi Kohan (University of Tehran) Mohammadreza Najafi (University of Tehran) - -, -, FR |
07/01/2011 - 22:08 | ||
Magnetic PDK - Magnetic Process Design Kit for Hybrid CMOS / Magnetic process |
Guillaume PRENAT (CEA-SPINTEC) Kholdoun TORKI (CMP) - -, -, FR |
07/01/2011 - 22:08 | ||
A Software Supported Methodology for Rapid Exploration of Memory Hierarchies in FPGAs |
Kostas Siozios (School of Electrical and Computer Engineering , National Technical University of Athens) Dimitrios Soudris (School of Electrical and Computer Engineering , National Technical University of Athens) - -, -, GR |
07/01/2011 - 22:08 | ||
RcvASIP - FPGA Prototype of Flexible Heterogeneous multi-ASIP NoC-based Unified Turbo Receiver |
Atif Raza Jafri (Institut Telecom; Telecom Bretagne; Lab-STICC) Amer Baghdadi (Institut Telecom; Telecom Bretagne; Lab-STICC) Michel Jézéquel (Institut Telecom; Telecom Bretagne; Lab-STICC) - -, -, FR |
07/01/2011 - 22:08 | ||
WSN Energy Harvesting - Monitoring and Control of a Dynamically Reconfigurable Wireless Sensor Node Powered by Hybrid Energy Harvesting |
Faizal Arya Samman (TU Darmstadt) Manfred Glesner (TU Darmstadt) Ping Zhao (TU Darmstadt) - -, -, DE |
07/01/2011 - 22:08 | ||
eClock - All-Digital PLL Compiler for On-Chip High-Speed Clock Generation |
Chao-Wen Tzeng (Department of Electrical Engineering, National Tsing-Hua University, Taiwan ) Pei-Ying Chao (TinnoTek Inc., Hsinchu, Taiwan) Ruo-Ting Ding (Department of Electrical Engineering, National Tsing-Hua University, Taiwan) Shan-Chien Fang (TinnoTek Inc., Hsinchu, Taiwan) Chia-Chien Weng (Department of Electrical Engineering, National Tsing-Hua University, Taiwan) Shi-Yu Huang (Department of Electrical Engineering, National Tsing-Hua University, Taiwan) - -, -, TW |
07/01/2011 - 22:08 | ||
CλaSH - Functional Hardware Design in CλaSH |
Marco Gerards (University of Twente) Arjan Boeijink (University of Twente) Gerard Smit (University of Twente) Jan Kuper (University of Twente) Rinse Wester (University of Twente) Anja Niedermeier (University of Twente) Christiaan Baaij,... |
07/01/2011 - 22:08 |