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Tool Name | Author(s) | Updated | Screenshot | Average Vote |
---|---|---|---|---|
Digital System Design Environment | 10/26/2012 - 16:43 | |||
DMMR-MATISSE - Custom Dynamic Memory Allocation Tool | 10/02/2012 - 13:38 | |||
Dynamic Virtual Analyzer and Simulator |
Madsen, Jan Hasan Baig, DTU C... |
03/11/2016 - 13:05 | ||
eClock - All-Digital PLL Compiler for On-Chip High-Speed Clock Generation |
Chao-Wen Tzeng (Department of Electrical Engineering, National Tsing-Hua University, Taiwan ) Pei-Ying Chao (TinnoTek Inc., Hsinchu, Taiwan) Ruo-Ting Ding (Department of Electrical Engineering, National Tsing-Hua University, Taiwan) Shan-Chien Fang (TinnoTek Inc., Hsinchu, Taiwan) Chia-Chien Weng (Department of Electrical Engineering, National Tsing-Hua University, Taiwan) Shi-Yu Huang (Department of Electrical Engineering, National Tsing-Hua University, Taiwan) - -, -, TW |
07/01/2011 - 22:08 | ||
EDADB - Tools for semi-automatic Technology Porting of Integrated Mixed-Signal Circuits and Documentation |
Volker Boos, Inst... |
09/10/2012 - 16:47 | ||
EduCAD - an Efficient, Flexible and Easily Revisable Physical Design Tool for Educational Purposes |
Saba Amanollahi (Shahid Beheshti University) Ali Jahanian (Shahid Beheshti University) - -, -, IR |
07/01/2011 - 22:08 | ||
Embedded Instruments for Board-level Test |
Sergei Devadze (Supervisor) Artur Jutman (Supervisor) Raimund Ubar (Supervisor) - -, -, EE |
07/01/2011 - 22:08 | ||
Embedded System-Level Platform Synthesis and Application Mapping tool | 10/26/2012 - 16:43 | |||
Empire | 10/26/2012 - 16:43 | |||
ENHANCEMENTS OF STATECHART-MODELING— THE KIEL ENVIRONMENT | 10/26/2012 - 16:43 |