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Using dynamically reconfigurable instruction set architecture processor for SoC |
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10/26/2012 - 16:43 |
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Verification Environment for SoC - Demonstration of a Coverage Driven Verification Environment for UML Models of Systems-on-Chip |
Ludovic Apvrille (Telecom ParisTech) Renaud Pacalet (Telecom ParisTech)
Daniel Knorreck, ... |
07/01/2011 - 22:08 |
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Versatile SoC Development Environment Supporting HW/SW Co-Design And Mixed Abstraction-level Simulation |
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10/26/2012 - 16:43 |
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VintAge - A simulation framework for the assessment of NBTI-induced aging effects in SoC designs |
Giulio Gambardella (Politecnico di Torino) Daniele Rolfo (Politecnico di Torino) Massimo Poncino (Politecnico di Torino)
- -, -, IT |
07/01/2011 - 22:08 |
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VisualHDL: Bringing C++ productivity to VHDL world |
Christian de Schryver (University of Kaiserslautern) Norbert Wehn (University of Kaiserslautern)
- -, -, DE |
03/21/2012 - 16:35 |
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WCDMA DPD ADC: Optimizing and validating high level design parameters of ADC for digital predistortion in base stations |
Patricia Desgreys (LTCI-CNRS UMR 5141 - Institute TELECOM - TELECOM ParisTech) Patrick Loumeau (LTCI-CNRS UMR 5141 - Institute TELECOM - TELECOM ParisTech) Riccardo Giacometti (Agilent Technologies Inc.)
- -, -, FR |
03/21/2012 - 16:35 |
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Workcraft: a static data flow structure editing, visualisation and analysis tool |
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10/26/2012 - 16:43 |
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WSN Energy Harvesting - Monitoring and Control of a Dynamically Reconfigurable Wireless Sensor Node Powered by Hybrid Energy Harvesting |
Faizal Arya Samman (TU Darmstadt) Manfred Glesner (TU Darmstadt) Ping Zhao (TU Darmstadt)
- -, -, DE |
07/01/2011 - 22:08 |
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XSIM: An Efficient Simulator for Crosstalk Analysis netween On-chip Interconnects
Kishore Duganapalli |
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10/26/2012 - 16:43 |
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YARDstick: Automation tool for custom processor development |
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10/26/2012 - 16:43 |
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