A modular test chip (15 x 15 mm) consisting of 24 basic tiles and 4 small tiles has been designed and processed in a 0.35µ CMOS technology from AMIS. The basic tile on the test chip comprises a 10 A bonding pad structure, crack sensors, corrosion sensors, daisy chain structures, heaters and temperature monitoring diodes at the center of the chip and beneath the10 A bonding pad structure. The test chip comprises different track designs to check current crowding. The test chip is used to perform reliability tests on first level contacts for wire bonding and flip chip technologies at currents up to 10 A.

Projects:
INISPA

Contact:
Jozef Vanneuville (jkc.vanneuville@skynet.be)