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SHINE: FPGA prototyping of SpaceWire IP cores for High Data Rate and Fault Tolerant Invehicle Networking

Fri, 10/26/2012 - 16:43 — Andreas Vörg, eda...
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(unregistered) Author(s): 
Luca Fanucci

An FPGA, hosted by a Nallatech BenNUEY PCI-board, is programmed with an 8-port SpaceWire Router IP core featuring an AMBA AHB interface. The router is controlled by a PC through a PCI/AHB bridge. A user-friendly GUI, which hides a dedicated software layer, provides full control over router features (link speed, router table, etc.) and monitors relevant traffic information.

Contact:
Luca Fanucci (luca.fanucci@iet.unipi.it)

Project Information
Project Acronym: 
IPPM
Project Description: 
Integrated Payload Processing and storage Module (IPPM) in the framework of the European Space Agency's Basic Technology Research Program: Participation in the development of IPPM, a flexible system operating as a real single board compact computer meeting the requirements of different Space mission scenarios. IPPM is a single EM module self-contained computer based on a Leon2 CPU, equipped with a large amount of memory on-board (SDRAM, FLASH, SRAM, PROM) and with a wide inter-networking capability (8-link SpaceWire Router, CAN links, MIL-STD-1553B bus, PCI bus). All the peripheral units are implemented on Rad-Tolerant FPGA devices. The board needs a single power supply thanks to an on-board DC/DC converter.


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