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VintAge - A simulation framework for the assessment of NBTI-induced aging effects in SoC designs |
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07/01/2011 - 21:08 |
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Versatile SoC Development Environment Supporting HW/SW Co-Design And Mixed Abstraction-level Simulation |
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10/26/2012 - 15:43 |
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Verification Environment for SoC - Demonstration of a Coverage Driven Verification Environment for UML Models of Systems-on-Chip |
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07/01/2011 - 21:08 |
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Using dynamically reconfigurable instruction set architecture processor for SoC |
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10/26/2012 - 15:43 |
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Turbo Tester |
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10/26/2012 - 15:43 |
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TTool for DIPLODOCUS: An Environment for Design Space Exploration |
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10/26/2012 - 15:43 |
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Trust-by-Wire in Packet-switched IP Networks: Calling Line Identification Presentation for IP |
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10/26/2012 - 15:43 |
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Topas |
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10/26/2012 - 15:43 |
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TOISE: Trusted Computing for European Embedded devices |
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03/21/2012 - 15:35 |
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TLM Synthesis Studio |
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10/26/2012 - 15:43 |
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